AMX DESIGN XPRESS V 1.5 - PROGRAMMER GUIDE User's Guide download pdf (Page 51)

Virtex-5 FPGA Integrated Endpoint Block www.xilinx.com 51

UG197 (v1.5) July 22, 2009

Virtex-5 FPGA Integrated Endpoint Block Interface Descriptions

L0STATSTLPTRANSMITTED

Output core_clk Asserted for a single clock cycle when a

TLP is transmitted.

L0STATSCFGRECEIVED

Output user_clk Asserted for a single cycle of

CRMUSERCLK when a configuration

packet is received by the configuration

block.

L0STATSCFGTRANSMITTED

Output user_clk Asserted for a single cycle of

CRMUSERCLK when a configuration

packet is transmitted by the

configuration block.

L0STATSCFGOTHERRECEIVED

Output user_clk Asserted for a single cycle of

CRMUSERCLK when a packet of any

other type (e.g., a message packet or a

posted memory write packet relating to

MSI) is received by the configuration

block.

L0STATSCFGOTHERTRANSMITTED

Output user_clk Asserted for a single cycle of

CRMUSERCLK when one of these other

types of packet is transmitted by the

configuration block.

IOSPACEENABLE

Output user_clk I/O space enable. When 1, shows that

response to I/O request packets has

been enabled.

MEMSPACEENABLE

Output user_clk Memory space enable. When 1,

response to memory request packets

has been enabled.

MAXPAYLOADSIZE[2:0]

Output user_clk Negotiated Max Payload size, as

follows:

000: 128 bytes

001: 256 bytes

010: 512 bytes

011: 1024 bytes

100: 2048 bytes

101: 4096 bytes

110: Reserved

111: Reserved

MAXREADREQUESTSIZE[2:0]

Output user_clk Negotiated Read request size, as

follows:

000: 128 bytes

001: 256 bytes

010: 512 bytes

011: 1024 bytes

100: 2048 bytes

101: 4096 bytes

110: Reserved

111: Reserved

Table 2-16: Configuration and Status Ports (Continued)

Port Direction

Clock

Domain

Description

1 ... 50 51 52 ... 120

Comments to this Manuals

No comments

AMX DESIGN XPRESS V 1.5 - PROGRAMMER GUIDE User's Guide Page 51

Comments to this Manuals

Related products and manuals for TVs & monitors AMX DESIGN XPRESS V 1.5 - PROGRAMMER GUIDE