AMX TXC16 Plus Specifications download pdf (Page 204)

SG-2000 MANUAL 197

The SGC Building, 13737 S.E. 26th St. Bellevue, WA. 98005 USA

IC6 is a Quad 2-Input NOR Gate, 74HC02.

Truth Table

IC6A

Outputs

Inputs

H = high

L = low

IC8 is an Asynchronous Communications Interface Adapter (ACIA), HD63B50.

The data rate = RxC or TxC / 16. Normally this is set to 9600. The parallel

input/output lines are B0 through B7.

The Transmit Data (TxD pin 6) is the serial output line. It is normally “high”

when not in use.

The Receive Data (RxD pin 2) is the serial input line. It floats at about 2.5 volts

when not in use.

Enable (E pin 14) enables the bus input/output data buffers and clocks data to

and from the ACIA.

Chip Selects (CS0, pin 8, CS1, pin 10, and CS2 bar, pin 9) are high impedance

TTL compatible input lines used to address the ACIA. The ACIA is selected

when CS0 and CS1 are "high" and CS2 bar is "low". Transfers to and from the

ACIA are then performed under the control of the Enable (E) signal,

Read/Write, and Register Select.

Transmit/Receive Data Registers and a "low" level the Control/Status

Registers. The R/W line is used in conjunction with Register Select to select the

read-only or write-only register in each register pair.

Read/Write (R/W pin 13) is used to control the direction of data. A "high" on

the Read/Write enables the read-only register and a "low" enable the write-

only registers.

Interrupt Request (IRQ bar) is an open drain (no internal pull-up) active "low"

output interrupt that is set internally to the chip. The IRQ bar stays low as long

as the cause of the interrupt is present within the ACIA.

The Clear-to-Send (CTS bar, pin 24) should be connected to ground.

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AMX TXC16 Plus Specifications Page 204