© Copyright IBM Corp. 2008. All rights reserved. 23
Draft Document for Review May 28, 2009 1:59 pm 4405ch02 Architecture and technical overview.fm
Chapter 2. Architecture and technical
overview
This chapter discusses the overall system architecture represented by Figure 2-1, with its
major components described in the following sections. The bandwidths that are provided
throughout the section are theoretical maximums used for reference. You should always
obtain real-world performance measurements using production workloads.
Figure 2-1 570 logic data flow
2
SMP
fabric
bus
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
L3
cache
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
L3
cache
POWER6
chip
Fabric Bus
8 Bytes each dir
2 (Processor
Clock):1
Elastic Interface
CPU planar
CPU card #1
SMP fabric bus cable connection
CPU card #2
P5IOC2 chip
IVE
core
Integrated Virtual
Ethernet adapter
(2 or 4 Ethernet ports)
PCI-X
host
bridge
PCI-e
host
bridge
Slot #6 Slot #5 Slot #4 Slot #3 Slot #2 Slot #1
133 MHz 1.5 V
20 Gbps 8x
PCI-X to PCI-X
bridge
64 b 133 MHz
SAS
controller
64 b 133 MHz
RAID
enablement
slot
SAS disk drive 6-pack backplane
SAS expander SAS expander
SAS external
connector to
PCI adapter
CD/DVD
S-ATA to IDE
converter
S-ATA to IDE
converter
CD/DVD
2 slim-line media device
backplane
bridge
USB
USB
mux
USB
port #2
USB
port #1
32 b
33 MHz
Service
processor
HMC
port #1
HMC
port #2
Service processor
interconnect cable
connector
SPCN
port #1
SPCN
port #2
Operator panel
Serial
port #1
Serial
port #2
VPD
card
Serial
port #1
First GX+ adapter slot
(shares volume with PCI-e slot 6)
Second GX+ adapter slot
POWER6
chip
GX+ Bus
4 Bytes each dir
3 (Proc Clk):1
Elastic Intfc
GX+
adapter
ports
GX+
adapter
ports
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