AMX PTM-D15 User Manual Page 18

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MC9S12H256 Device User Guide — V01.18
18
BDM (Background Debug Mode)
CRG (low current oscillator, PLL, reset, clocks, COP watchdog, real time interrupt, clock monitor)
8-bit and 4-bit ports with interrupt functionality
Digital filtering
Programmable rising or falling edge trigger
Memory
128K, 256K Flash EEPROM
2K, 4K byte EEPROM
6K, 12K byte RAM
Analog-to-Digital Converter
8, 16 channels, 10-bit resolution
External conversion trigger capability
Two 1M bit per second, CAN 2.0 A, B software compatible modules
Five receive and three transmit buffers
Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8x8bit
Four separate interrupt channels for Rx, Tx, error and wake-up
Low-pass filter wake-up function
Loop-back for self test operation
Timer
16-bit main counter with 7-bit prescaler
8 programmable input capture or output compare channels
Two 8-bit or one 16-bit pulse accumulators
2, 6 PWM channels
Programmable period and duty cycle
8-bit 2, 6-channel or 16-bit 1, 3-channel
Separate control for each pulse width and duty cycle
Center-aligned or left-aligned outputs
Programmable clock select logic with a wide range of frequencies
Fast emergency shutdown input
Serial interfaces
Two asynchronous Serial Communications Interfaces (SCI)
Synchronous Serial Peripheral Interface (SPI)
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