AMX PTM-D15 User Manual Page 105
- Page / 130
- Table of contents
- BOOKMARKS
- MC9S12H256 1
- Device User Guide 1
- Covers also MC9S12H128 1
- Revision History 2
- Section 1 Introduction 5
- Section 2 Signal Description 5
- Section 1 Introduction 17
- 1.3 Modes of Operation 19
- 1.4 Block Diagram 20
- 1.5 Device Memory Map 24
- Address Module 26
- 1.5.1 Detailed Register Map 30
- $0020 - $0027 Reserved 32
- $0070 - $007F Reserved 35
- $00B0 - $00BF Reserved 37
- PWMRSTRT 40
- LCDSWAI LCDRPSTP 42
- 1.6 Part ID Assignments 53
- Register name Value 54
- MEMSIZ0 $25 54
- MEMSIZ1 $81 54
- Section 2 Signal Description 55
- MC9S12H-Family 56
- 112 LQFP 56
- 144 LQFP 57
- Table 2-1 Signal Properties 58
- 2.4 Power Supply Pins 66
- 3.1 Overview 69
- Section 4 Modes of Operation 71
- 4.2.1 Normal Operating Modes 72
- 4.3 Security 76
- 4.4 Low Power Modes 77
- 5.1 Overview 79
- 5.2 Vectors 79
- 5.3 Effects of Reset 80
- 5.3.2 Memory 81
- 7.1.1 XCLKS 83
- 21.1.1 VREGEN 85
- 21.1.2 Modes of Operation 85
- 21.2 Recommended PCB layout 86
- Component Purpose Type Value 88
- A.1 General 89
- A.1.3 Pins 90
- A.1.4 Current Injection 90
- A.1.7 Operating Conditions 93
- A.1.9 I/O Characteristics 94
- A.1.10 Supply Currents 97
- A.2 ATD Characteristics 99
- NOTE: Figure A-1 102
- Table A-10 102
- A.3 NVM, Flash and EEPROM 103
- A.4.1 Startup 107
- A.4.2 Oscillator 108
- 3. XCLKS =1 during reset 109
- A.5 MSCAN 113
- A.6 SPI 115
- A.6.2 Slave Mode 117
- A.7 LCD_32F4B 119
- A.8 External Bus Timing 121
- B.1 General 125
- B.2 112-pin LQFP package 126
- B.3 144-pin LQFP package 127
- User Guide End Sheet 129
- FINAL PAGE OF 130
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