AMX AXP-AI8 ANALOG 8-INPUT BOARD User Manual download pdf (Page 12)

DNA/DNR-AI-217 Simultaneous Sampling Differential Analog Input Board

Chapter 1 8

Introduction

Tel: 508-921-4600 www.ueidaq.com Vers: 4.5

Date: April 2013 DNx-AI-217 Chap1x.fm

United Electronic Industries, Inc.

1.6 Device

Architecture

Figure 1-1 is a block diagram of the architecture of the AI-217 layer.

Figure 1-1. Block Diagram of the AI-217 Layer

Each AI-217 has sixteen differential input channels designed for high-speed,

high-resolution analog voltage signal measurement. Each channel has 24-bit

sampling resolution over a ±10V input range and and maximum sampling rate of

120000 samples per second (one sample every 8.3

µsec) for the AI-217-1 or

30000 samples per second (one sample every 33.3

µsec) for the AI-217-803.

Each AI-217 is capable of up to 480000 max samples per second maximum.

The DNx-AI-217 is fully isolated from the Cube or RACKtangle chassis and is

overvoltage protected up to ±40V with power on or off. When power is removed,

the inputs go into a high impedance mode, making the AI-217 an ideal choice for

redundant measurement/control applications.

Each channel’s input consists of two pins: a pair of analog input lines that carry

the voltage to be sampled. The analog input lines (Ain+ and Ain- in Figure 1-1)

enter through the DB-37 connector pins into a protection, then into a simple R-C

low-pass filter circuit on the front end used for anti-aliasing, then into a PGA to

be amplified by 1, 2, 4, 8, 16, 32, 64x and then into an A/D to be sampled.

There is one 24-bit over-sampled successive approximation A/D converter per

input channel plus one for a dedicated CJC input. Using a single ADC for each

input channel virtually eliminates input crosstalk and channel settling time issues

even when connected to high impedance signal sources. All sixteen analog

PGA

DB-37 Analog Input Connector

32-bit 66MHz Bus

Analog Voltages

Isolation

Channel 1 of 16

2x +5V DC/DC

(sw controlled)

–

±10V -

±10V +

EEPROM

Control

Reference

Calibration

Logic

4ch

±40V

Protection

24-bit

FIR

(4x4ch)

1ch

PGA

280

24-bit

1ch ADC

(8x O/S)

FPGA

Channels 2 to 4

Channels 5 to 8

Channels 9 to 12

Channels 13 to 16

AGnd

+13V 50mA

Ext_Trig

CJC+

Channel 17

24-bit

ADC

1kΩ

1 2 ... 7 8 9 10 11 12 13 14 15 16 17 ... 24 25

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AMX AXP-AI8 ANALOG 8-INPUT BOARD User Manual Page 12

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